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  ltc4097 1 4097f ltc4097 dcin usbin iusb idc bat vntc hpwr ntc iterm 1.24k 1% 2k 1% 2k 1% wall adapter usb port 1 f 1 f + 4.2v single cell li-ion battery 800ma (wall) 100ma/500ma (usb) 4097 ta01 gnd t time (hr) 0 charge current (ma) battery voltage (v) dcin voltage (v) 4.2 200 0 400 800 600 1000 1.5 2.5 4097 ta01b 3.6 3.4 5.0 4.0 3.8 2.5 0 0.5 1.0 2.0 3.0 constant voltage usbin = 5v t a = 25 c r idc = 1.24k r iusb = 2k hpwr = 5v typical application features applications description usb/wall adapter standalone li-ion/polymer battery charger the ltc ? 4097 is a standalone linear battery charger that is capable of charging a single-cell li-ion or li-polymer battery from both wall adapter and usb inputs. the charger can detect power at the inputs and automatically select the appropriate power source for charging. no external sense resistor or blocking diode is required for charging due to the internal mosfet architecture. internal thermal feedback regulates the battery charge current to maintain a constant die temperature during high power operation or high ambient temperature conditions. the ? oat voltage is ? xed at 4.2v and the charge current is programmed with an external resistor. the ltc4097 terminates the charge cycle when the charge current drops below the user programmed termination threshold after the ? nal ? oat voltage is reached. the ltc4097 can be put into shutdown mode reducing the dcin supply current to 20a, the usbin supply current to 10a, and the battery drain current to less than 2a even with power applied to both inputs. other features include trickle charge, automatic recharge, undervoltage lockout, charge status output, an ntc therm- istor input used to monitor battery temperature and vntc power present output with 120ma drive capability. dual input battery charger for single-cell li-ion battery , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. *protected by u.s. patents including 6522118. charges single-cell li-ion/polymer battery from wall adapter and usb inputs automatic input detection (wall adapter input has charging priority) charge current programmable up to 1.2a from wall adapter input programmable charge current termination ntc thermistor input for temperature quali? ed charging independent dc, usb charge current programming preset float voltage with 0.6% accuracy thermal regulation maximizes charge rate without risk of overheating* charge status output automatic recharge 20a charger quiescent current in shutdown available in a thermally enhanced, low pro? le (0.75mm) 12-lead (3mm 2mm) dfn package cellular telephones mp3 players portable handheld devices complete charge cycle (1100mah battery)
ltc4097 2 4097f electrical characteristics package/order information absolute maximum ratings v dcin , v usbin t < 1ms and duty cycle < 1% .................. C0.3v to 7v steady state ............................................. C0.3v to 6v bat, ? c ? h ? r ? g, ntc, hpwr, susp ................... C0.3v to 6v idc, iusb, iterm ............................C0.3v to v cc + 0.3v bat short-circuit duration ............................ continuous vntc short-circuit duration ......................... continuous dcin, bat pin current (note 6) .............................1.25a usbin pin current (note 6) .....................................1.1a idc, iusb, iterm pin current ............................1.25ma junction temperature ........................................... 125c operating temperature range (note 2) ... C40c to 85c storage temperature range ................... C65c to 125c (note 1,7) symbol parameter conditions min typ max units v dcin adapter supply voltage 4.25 5.5 v v usbin usb supply voltage 4.25 5.5 v i dcin dcin supply current charge mode (note 4), r idc = 10k standby mode; charge terminated shutdown mode (susp = 5v) 250 50 20 800 100 40 a a a i usbin usbin supply current charge mode (note 5), r iusb = 10k, v dcin = 0v standby mode; charge terminated, v dcin = 0v shutdown (v dcin = 0v, susp = 5v) v dcin > v usbin 250 50 20 10 800 100 40 20 a a a a v float regulated output (float) voltage i bat = 1ma i bat = 1ma, 0c < t a < 85c 4.179 4.158 4.2 4.2 4.221 4.242 v v i bat bat pin current r idc = 1.25k, constant-current mode r iusb = 2.1k, constant-current mode r iusb = 2.1k, constant-current mode, hpwr = 0v r idc = 10k or r iusb = 10k standby mode, charge terminated shutdown mode (charger disabled) sleep mode (v dcin = 0v, v usbin = 0v) 750 450 90 88 800 476 95 100 C5 C2 C5 850 500 100 112 C8 C4 C8 ma ma ma ma a a a v idc idc pin regulated voltage constant-current mode, r idc = 1.25k 1 v v iusb iusb pin regulated voltage constant-current mode, r iusb = 2k constant-current mode, r iusb = 2k, hpwr = 0 1 0.2 v v i terminate charge current termination threshold r iterm = 1k r iterm = 2k r iterm = 10k 88 42 6 100 50 9.5 112 58 13 ma ma ma i trikl trickle charge current v bat < v trikl ; r idc = 1k v bat < v trikl ; r iusb = 2k 85 42 100 50 115 58 ma ma top view 13 ddb package 12-lead (3mm 2mm) plastic dfn dcin usbin vntc chrg susp ntc bat gnd idc iusb iterm hpwr 8 7 10 9 11 12 5 6 4 2 3 1 t jmax = 125c, ja = 60c/w (note 3) exposed pad (pin 13) is gnd, must be soldered to pcb order part number ddb part marking ltc4097eddb lcrm order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ consult ltc marketing for parts speci? ed with wider operating temperature ranges. the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v dcin = 5v, v usbin = 5v, hpwr = 5v, ntc = 0v, r idc = 1k , r iusb = 2k , r iterm = 2k unless otherwise noted.
ltc4097 3 4097f note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc4097 is guaranteed to meet the performance speci? cations from 0c to 85c. speci? cations over the C 40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: failure to correctly solder the exposed pad of the package to the pc board will result in a thermal resistance much higher than 60c/w. see symbol parameter conditions min typ max units v trikl trickle charge threshold voltage v bat rising hysteresis 2.8 2.9 135 3v mv v uvdc dcin undervoltage lockout voltage from low to high hysteresis 4 4.22 200 4.4 v mv v uvusb usbin undervoltage lockout voltage from low to high hysteresis 3.8 4 200 4.2 v mv v asd-dc v dcin C v bat lockout threshold voltage v dcin from high to low, v bat = 4.3v v dcin from low to high, v bat = 4.3v 530 100 55 mv mv v asd-usb v usbin C v bat lockout threshold voltage v usbin from high to low, v bat = 4.3v v usbin from low to high, v bat = 4.3v 530 150 55 mv mv v susp , v hpwr v il , logic low voltage 0.5 v v ih , logic high voltage 1.2 v r susp susp pulldown resistance 3.4 m r hpwr hpwr pulldown resistance 3.4 m v ? c ? h ? r ? g ? c ? h ? r ? g output low voltage i ? c ? h ? r ? g = 5ma 62 150 mv v rechrg recharge battery threshold voltage v float C v rechrg 70 100 130 mv t rechrg recharge comparator filter time v bat from high to low 1.6 ms t iterm termination comparator filter time i bat drops below termination threshold 3 ms r on-dc power fet on resistance (between dcin and bat) 420 m r on-usb power fet on resistance (between usbin and bat) 470 m t lim junction temperature in constant-temperature mode 115 c i vntc vntc pin current v vntc = 4.55v dcin powered v vntc = 4.8v usbin powered 30 30 ma ma v vntc vntc bias voltage i vntc = 250a 4.25 5.5 v i ntc ntc input leakage current v ntc = 1v 0 1 a v ntc-cold cold temperature fault threshold voltage rising threshold hysteresis 0.765 ? v vntc 0.016 ? v vntc v v v ntc-hot hot temperature fault threshold voltage falling threshold hysteresis 0.349 ? v vntc 0.016 ? v vntc v v v ntc-dis ntc disable threshold voltage ntc input voltage to gnd (falling) hysteresis 0.017 ? v vntc 0.01 ? v vntc v v electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v dcin = 5v, v usbin = 5v, hpwr = 5v, ntc = 0v, r idc = 1k , r iusb = 2k r iterm = 2k unless otherwise noted. thermal considerations. note 4: supply current includes idc and iterm pin current (approximately 100a each) but does not include any current delivered to the battery through the bat pin. note 5: supply current includes iusb and iterm pin current (approximately 100a each) but does not include any current delivered to the battery through the bat pin. note 6: guaranteed by long term current density limitations. note 7: v cc is greater of dcin or usbin
ltc4097 4 4097f typical performance characteristics ntc = 0v, hpwr = 5v, t a = 25c, unless otherwise noted. v iusb (v) 4097 g09 1.006 1.004 1.002 1.000 0.998 0.996 0.994 v usbin = 5v r iusb = 10k temperature ( c) C50 C25 0 50 25 75 100 v idc (v) 4097 g08 1.006 1.004 1.002 1.000 0.998 0.996 0.994 v dcin = 5v r idc = 10k temperature ( c) C50 C25 0 50 25 75 100 v iusb (v) 0 i bat (ma) 1.2 0.8 1.0 0.6 0.4 4097 g07 0.2 600 500 300 100 400 200 0 v usbin = 5v r iusb = 2k v usbin (v) 4.25 v bat (v) 5.50 5.00 5.25 4097 g05 4.75 4.50 4.26 4.24 4.22 4.20 4.18 4.16 4.14 4.12 4.10 i bat = 10ma r iusb = 2k v dcin (v) 4.25 v bat (v) 5.50 5.00 5.25 4097 g04 4.75 4.50 4.26 4.24 4.22 4.20 4.18 4.16 4.14 4.12 4.10 i bat = 10ma r idc = 1k v bat (v) 4097 g03 4.215 4.210 4.205 4.200 4.195 4.190 4.185 4.180 4.175 v dcin = 5v r idc = 1k v usbin = 5v r iusb = 2k temperature ( c) C50 C25 0 50 25 75 100 charge current (ma) 0 v bat (v) 600 300 500 400 4097 g02 200 100 4.26 4.24 4.22 4.20 4.18 4.16 4.14 4.12 4.10 v usbin = 5v r iusb = 2k charge current (ma) 0 v bat (v) 1200 800 1000 600 400 4097 g01 200 v dcin = 5v r idc = 1k 4.26 4.24 4.22 4.20 4.18 4.16 4.14 4.12 4.10 battery regulated output (float) voltage vs dcin voltage charge current vs idc pin voltage charge current vs iusb pin voltage iusb pin voltage vs temperature (constant-current mode) battery regulated output (float) voltage vs charge current battery regulated output (float) voltage vs charge current battery regulated output (float) voltage vs temperature battery regulated output (float) voltage vs usbin voltage idc pin voltage vs temperature (constant-current mode) v idc (v) 0 i bat (ma) 1.2 0.8 1.0 0.6 0.4 4097 g06 0.2 v dcin = 5v r idc = 1k 1200 1000 800 600 400 200 0
ltc4097 5 4097f typical performance characteristics ntc = 0v, hpwr = 5v, t a = 25c, unless otherwise noted. i bat (ma) 4097 g17 v dcin = 5v r idc = 1k ja = 60 c/w 1200 1000 800 600 400 200 0 v bat (v) 2.0 4.5 2.5 3.5 3.0 4.0 thermal regulation v dcin , v usbin (v) 4.25 5.50 5.00 5.25 4097 g16 4.75 4.50 i bat (ma) 104 102 100 98 96 v bat = 3.7v r idc = 10k r iusb = 10k temperature ( c) C50 C25 0 50 25 75 125 100 i bat (ma) 4097 g15 v dcin = 5v v usbin = 5v v bat = 3.7v ja = 60 c/w r idc = 1k r iusb = 2k 1200 1000 800 600 400 200 0 thermal regulation v bat (v) 3.0 i bat (ma) 4.0 3.6 3.8 4097 g14 3.4 3.2 600 575 550 525 500 475 450 425 400 v usbin = 5v r iusb = 2k v bat (v) 3.0 i bat (ma) 4.0 3.6 3.8 4097 g13 3.4 3.2 1200 1150 1100 1050 1000 950 900 850 800 v dcin = 5v r idc = 1k thermal regulation ? v rechrg (mv) 4097 g12 120 115 110 105 100 95 90 85 80 v dcin = v usbin = 5v temperature ( c) C50 C25 0 50 25 75 100 v dcin (v) 4.25 5.50 5.00 5.25 4097 g10 4.75 4.50 v idc (v) 1.006 1.004 1.002 1.000 0.998 0.996 0.994 v bat = 3.7v r idc = 10k v usbin (v) 4.25 5.50 5.00 5.25 4097 g11 4.75 4.50 v iusb (v) 1.006 1.004 1.002 1.000 0.998 0.996 0.994 v bat = 3.7v r iusb = 10k recharge threshold voltage vs temperature charge current vs battery voltage charge current vs battery voltage charge current vs ambient temperature with thermal regulation charge current vs supply voltage charge current vs battery voltage idc pin voltage vs v dcin (constant-current mode) iusb pin voltage vs v usbin (constant-current mode) charge current vs battery voltage i bat (ma) 4097 g18 v usbin = 5v r iusb = 2k ja = 60 c/w 600 500 400 300 200 100 0 v bat (v) 2.0 4.5 2.5 3.5 3.0 4.0
ltc4097 6 4097f typical performance characteristics r susp (m ? ) 4097 g27 4.5 2.5 3.0 3.5 4.0 temperature ( c) C50 C25 0 50 25 75 100 v chrg (mv) 4097 g24 100 80 60 40 20 0 i chrg = 5ma v dcin = v usbin = 4.25v v dcin = v usbin = 5.5v temperature ( c) C50 C25 0 50 25 75 100 i chrg (ma) 4097 g23 120 100 80 60 40 20 0 v chrg (v) 012 4 356 v dcin = v usbin = 5v v bat = 4v r vntc ( ? ) 4097 g21 20 15 10 5 0 v dcin = 5v i vntc = 30ma v usbin = 5v i vntc = 30ma temperature ( c) C50 C25 0 50 25 75 100 r dcon (m ? ) 4097 g19 550 500 450 400 350 300 v dcin = 4v i bat = 200ma temperature ( c) C50 C25 0 50 25 75 100 r usbon (m ? ) 4097 g20 550 500 450 400 350 300 v usbin = 4v i bat = 200ma temperature ( c) C50 C25 0 50 25 75 100 v vntc (v) 4097 g22 6 5 4 3 2 0 1 v usbin = 5v v dcin = 5v i vntc (ma) 0 25 50 100 75 125 150 v vntc vs i vntc ? c ? h ? r ? g pin output low voltage vs temperature susp pin threshold voltage (on-to-off) vs temperature susp pin pulldown resistance vs temperature dcin power fet on-resistance vs temperature usbin power fet on-resistance vs temperature vntc-dcin and vntc-usbin power fet on-resistance vs temperature ? c ? h ? r ? g pin i-v curve hpwr pin threshold voltage (on-to-off) vs temperature v susp (mv) 4097 g25 1000 800 700 850 900 950 750 v dcin = v usbin = 5v temperature ( c) C50 C25 0 50 25 75 100 v hpwr (mv) 4097 g26 1000 800 700 850 900 950 750 v dcin = 0v v usbin = 5v temperature ( c) C50 C25 0 50 25 75 100 ntc = 0v, hpwr = 5v, t a = 25c, unless otherwise noted.
ltc4097 7 4097f typical performance characteristics temperature ( c) C50 C25 v uv (v) 050 25 75 100 dcin uvlo usbin uvlo 4097 g31 4.10 3.95 3.90 3.85 3.80 3.75 4.05 4.00 3.70 shutdown supply current vs temperature and v usbin undervoltage lockout voltage (falling) vs temperature i usbin ( a) 4097 g30 60 50 30 40 20 10 0 susp = v usbin v dcin = 0v v usbin = 4.25v v usbin = 5.5v temperature ( c) C50 C25 0 50 25 75 100 ntc = 0v, hpwr = 5v, t a = 25c, unless otherwise noted. i dcin ( a) 4097 g29 60 50 30 40 20 10 0 susp = v dcin v usbin = v dcin v dcin = 4.25v v dcin = 5.5v temperature ( c) C50 C25 0 50 25 75 100 shutdown supply current vs temperature and v dcin hpwr pin pulldown resistance vs temperature r hpwr (m ? ) 4097 g28 4.5 2.5 3.0 3.5 4.0 temperature ( c) C50 C25 0 50 25 75 100
ltc4097 8 4097f pin functions dcin (pin 1): wall adapter input supply pin. provides power to the battery charger. the maximum supply current is 1.2a. this pin should be bypassed with a 1f capacitor. usbin (pin 2): usb input supply pin. provides power to the battery charger. the maximum supply current is 1a. this pin should be bypassed with a 1f capacitor. vntc (pin 3): output bias voltage for ntc. a resistor from this pin to the ntc pin sets up the bias for an ntc thermistor. when the dcin or usbin pin voltage is suf? cient to begin charging (i.e. when the dcin or usbin supply is greater than the undervoltage lockout thresholds and at least 100mv or 150mv, respectively, above the battery terminal), the vntc pin is connected to the appropriate input through an internal p-channel mosfet. if suf? cient voltage to charge is not present on dcin or usbin the vntc pin is high impedance. this output can source up to 120ma. ? c ? h ? r ? g (pin 4): open-drain charge status output. when the ltc4097 is charging, the ? c ? h ? r ? g pin is pulled low by an internal n-channel mosfet. when the charge cycle is com- pleted, ? c ? h ? r ? g becomes high impedance. this output can sink up to 10ma, making it suitable for driving a led. susp (pin 5): charge enable input. a logic low on this pin enables the charger. if left ? oating, an internal 3.4m pull-down resistor defaults the ltc4097 to charge mode. pull this pin high for shutdown. ntc (pin 6): input to the ntc (negative temperature coef? cient) thermistor temperature monitoring circuit. for normal operation, connect a thermistor from the ntc pin to ground and a resistor of equal value from the ntc pin to vntc. when the voltage at this pin drops below 0.349 ? vntc at hot temperatures or rises above 0.765 ? vntc at cold, charging is suspended and the ? c ? h ? r ? g pin output will keep the state in which it was be- fore the event (low-z or high-z). pulling this pin below 0.017 ? vntc disables the ntc feature. there is approxi- mately 2c of temperature hysteresis associated with each of the input comparators thresholds. hpwr (pin 7): hpwr enable input. used to control the amount of current drawn from the usb port. a logic high on the hpwr pin sets the charge current to 100% of the current programmed by the iusb pin. a logic low on the hpwr pin sets the charge current to 20% of the current programmed by the iusb pin. an internal 3.4m pull-down resistor defaults the hpwr pin to its low current state. iterm (pin 8): charge termination current threshold program. the termination current threshold, i terminate , is set by connecting a resistor, r iterm , to ground. i terminate is set by the following formula: i v r terminate iterm = 100 when the battery current, i bat , falls below the termination threshold, charging stops and the ? c ? h ? r ? g output becomes high impedance.
ltc4097 9 4097f pin functions iusb (pin 9): charge current program for usb power. the charge current is set by connecting a resistor, r iusb , to ground. when charging in constant current mode, this pin servos to 1v. the voltage on this pin can be used to measure the battery current delivered from the usbin input using the following formula: i v r bat iusb iusb = ? 1000 idc (pin 10): charge current program for wall adapter power. the charge current is set by connecting a resistor, r idc , to ground. when charging in constant current mode, this pin servos to 1v. the voltage on this pin can be used to measure the battery current delivered from the dcin input using the following formula: i v r bat idc idc = ?1000 gnd (pin 11): ground. bat (pin 12): charger output. this pin provides charge current to the battery and regulates the ? nal ? oat voltage to 4.2v. exposed pad (pin 13): ground. the exposed backside of the package is ground and must be soldered to the pc board ground for electrical connection and maximum heat transfer.
ltc4097 10 4097f block diagram C + C + C + C + C + C + C + C + rechrg trickle term logic 4.1v bat 4.2v bat 4v bat 2.9v 100mv i bat /1000 i bat /1000 i bat /1000 4 5 8 10 9 11, 13 dc_enable usb_enable charger control cc/cv regulator cc/cv regulator 12 1 2 r iterm r iusb r idc iterm iusb idc gnd 150 c C 115 c t die usbon dcon usbin uvlo dcin uvlo dcin bat usbin 7 hpwr susp r susp chrg termination trickle charge recharge thermal regulation and shutdown 10ma max 4097 bd C + C + r nom r 1 r 2 r 3 r ntc r 4 ntc vntc 3 C + 6 too cold too hot ntc_en suspend r hpwr
ltc4097 11 4097f operation the ltc4097 is designed to ef? ciently manage charging a single-cell lithium-ion battery from two separate power sources: a wall adapter and usb power bus. using the constant-current/constant-voltage algorithm, the charger can deliver up to 1.2a of charge current from the wall adapter supply or up to 1a of charge current from the usb supply with a ? nal ? oat voltage accuracy of 0.6%. the ltc4097 has two internal p-channel power mosfets, thermal regulation and shut down circuitry. no blocking diodes or external sense resistors are required. power source selection the ltc4097 can charge a battery from either the wall adapter input or the usb port input. the ltc4097 automati- cally senses the presence of voltage at each input. if both power sources are present, the ltc4097 defaults to the wall adapter source provided suf? cient power is present at the dcin input. suf? cient power is de? ned as: ? supply voltage is greater than the uvlo threshold. ? supply voltage is greater than the battery voltage by 30mv (100mv or 150mv rising, 30mv falling). the vntc output pin indicates that suf? cient input voltage is available. table 1 describes the behavior of the power source selection. table 1. power source selection v usbin > 4v and v usbin > bat + 30mv v usbin < 4v or v usbin < bat + 30mv v dcin > 4.2v and v dcin > bat + 30mv charger powered from wall adapter source; usbin current < 25a charger powered from wall adapter source v dcin < 4.2v or v dcin < bat + 30mv charger powered from usb source no charging programming and monitoring charge current the charge current delivered to the battery from the wall adapter supply is programmed using a single resistor from the idc pin to ground. r v i i v r idc chrg dc chrg dc idc == 1000 1000 () () , similarly, the charge current from the usb supply is programmed using a single resistor from the iusb pin to ground. setting hpwr pin to its high state will select 100% of the programmed charge current, while setting hpwr to its low state will select 20% of the programmed charge current. r v i hpwr high i iusb chrg usb chrg usb == 1000 () () () = == = 1000 200 v r hpwr high i v r iusb chrg usb ius () () bb hpwr low () = charge current out of the bat pin can be determined at any time by monitoring the idc or iusb pin voltage and applying the following equations: i v r ch ing from wall adapter bat idc idc = ?,(arg 1000 )) ?, (arg sup i v r ch ing from usb p bat iusb iusb = 1000 ll y h p w r h i g h i v r ch in bat iusb iusb ,) ?, (arg = = 200 g g from usb ply hpwr low sup , ) =
ltc4097 12 4097f programming charge termination the charge cycle terminates when the charge current falls below the programmed termination threshold during constant-voltage mode. this threshold is set by connect- ing an external resistor, r iterm , from the iterm pin to ground. the charge termination current threshold (i terminate ) is set by the following equation: r v i i v r iterm terminate terminate iterm == 100 100 , the termination condition is detected by using an internal ? ltered comparator to monitor the iterm pin. when the iterm pin voltage drops below 100mv* for longer than t terminate (typically 3ms), the charge cycle terminates, charge current latches off and the ltc4097 enters standby mode. when charging, transient loads on the bat pin can cause the iterm pin to fall below 100mv for short periods of time before the dc charge current has dropped below the programmed termination current. the 3ms ? lter time (t terminate ) on the termination comparator ensures that transient loads of this nature do not result in premature charge cycle termination. once the average charge current drops below the programmed termination threshold, the ltc4097 terminates the charge cycle and ceases to provide any current out of the bat pin. in this state, any load on the bat pin must be supplied by the battery. low-battery charge conditioning (trickle charge) this feature ensures that deeply discharged batteries are gradually charged before applying full charge current. if the bat pin voltage is below 2.9v, the ltc4097 supplies 1/10th of the full charge current to the battery until the bat pin rises above 2.9v. for example, if the charger is operation *any external sources that hold the iterm pin above 100mv will prevent the ltc4097 from terminating a charge cycle. programmed to charge at 800ma from the wall adapter input and 500ma from the usb input, the charge current during trickle charge mode would be 80ma and 50ma, respectively. automatic recharge in standby mode, the charger sits idle and monitors the battery voltage using a comparator with a 1.6ms ? lter time (t rechrg ). a charge cycle automatically restarts when the battery voltage falls below 4.1v (which corresponds to approximately 80%-90% battery capacity). this ensures that the battery is kept at, or near, a fully charged condi- tion and eliminates the need for periodic charge cycle initiations. if the battery is removed from the charger, a sawtooth waveform appears at the battery output. this is caused by the repeated cycling between termination and recharge events. this cycling results in pulsing at the ? c ? h ? r ? g output; an led connected to this pin will exhibit a blinking pattern, indicating to the user that a battery is not present. the frequency of the sawtooth is dependent on the amount of output capacitance. status indicators the charge status output ( ? c ? h ? r ? g) has two states: pull-down and high impedance. the pull-down state indicates that the ltc4097 is in a charge cycle. once the charge cycle has terminated or the ltc4097 is disabled, the pin state becomes high impedance. the pull-down state is capable of sinking up to 10ma. the power present output (vntc) has two states: dcin/ usbin voltages and high impedance. the high impedance state indicates that suf? cient voltage is not present at either dcin or usbin, therefore no charging will occur. the vntc output is capable of sourcing up to 120ma steady state and includes short circuit protection.
ltc4097 13 4097f manual shutdown the susp pin has a 3.4m pulldown resistor to gnd. a logic low enables the charger and a logic high disables it (the pulldown defaults the charger to the charging state). the dcin input draws 20a when the charger is in shut- down. the usbin input draws 20a during shutdown if no power is applied to dcin, but draws only 10a when v dcin > v usbin . ntc thermistor the battery temperature is measured by placing a nega- tive temperature coef? cient (ntc) thermistor close to the battery pack. the ntc circuitry is shown in the block diagram of figure 4. to use this feature, connect the ntc thermistor, r ntc , between the ntc pin and ground and a bias resistor, r nom , from vntc to ntc. r nom should be a 1% resistor with a value equal to the value of the chosen ntc thermistor at 25c (r25). the ltc4097 will pause charging when the resistance of the 100k ntc thermistor drops to 0.54 times the value of r25 or approximately 54k (for a vishay curve 1 therm- istor, this corresponds to approximately 40c). as the temperature drops, the resistance of the ntc thermistor rises. the ltc4097 is also designed to pause charging when the value of the ntc thermistor increases to 3.25 times the value of r25. for a vishay curve 1 thermistor this resistance, 325k, corresponds to approximately 0c. the hot and cold comparators each have approximately 3c of hysteresis to prevent oscillation about the trip point. grounding the ntc pin disables all ntc functionality. thermal limiting an internal thermal feedback loop reduces the programmed charge current if the die temperature attempts to rise above a preset value of approximately 115c. this feature protects the ltc4097 from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without risk of damag- ing the device. the charge current can be set according to typical (not worst case) ambient temperature with the assurance that the charger will automatically reduce the current in worst case conditions. a safety thermal shut down circuit will turn off the charger if the die temperature rises above a value of approximately 150c. dfn power considerations are discussed further in the applications information section. operation
ltc4097 14 4097f operation trickle charge mode 1/10th full current chrg state: pulldown shutdown mode i usbin drops to 20 a chrg state: hi-z charge mode full current chrg state: pulldown charge mode full current ? hpwr = high 1/5 full current ? hpwr = low chrg state: pulldown standby mode no charge current chrg state: hi-z shutdown mode i dcin drops to 20 a chrg state: hi-z bat > 2.9v bat < 2.9v bat < 2.9v 2.9v < bat 2.9v < bat bat > 2.9v bat < 4.1v bat < 4.1v i bat < i terminate in voltage mode i bat < i terminate in voltage mode power selection standby mode no charge current chrg state: hi-z trickle charge mode 1/10th full current chrg state: pulldown susp driven high susp driven low susp driven high dcin power removed dcin power removed usbin power removed or dcin power applied usbin power removed or dcin power applied dcin power applied only usb power applied startup 4097 f01 susp driven low figure 1. ltc4097 state diagram of a charge cycle
ltc4097 15 4097f applications information ltc4097 dcin usbin iusb idc bat hpwr iterm r iset 2k 1% r iterm 2k 1% wall adapter usb port 1 f 1 f + 100ma (usb, hpwr = low) 500ma 4097 f02 gnd 4.2v 1-cell li-ion battery ltc4097 dcin usbin iusb idc bat vntc hpwr ntc chrg iterm r idc 1.24k 1% wall adapter usb port 1 f 1 f + 800ma (wall) 100ma/500ma (usb) 4097 f03 gnd r iusb 2k 1% r ntc 100k r ntcbias 100k 1k 4.2v 1-cell li-ion battery r iterm 2k 1% figure 2. dual input charger circuit. the wall adapter charge current and usb charge current are both programmed to be 500ma figure 3. full featured dual input charger circuit using a single charge current program resistor in applications where the programmed wall adapter charge current and usb charge current are the same, a single program resistor can be used to set both charge currents. figure 2 shows a charger circuit that uses one charge cur- rent program resistor. in this circuit, one resistor programs the same charge current for each input supply. ii v r chrg dc chrg usb set () ( ) == 1000 the ltc4097 can also program the wall adapter charge current and usb charge current independently using two program resistors, r idc and r iusb . figure 3 shows a charger circuit that sets the wall adapter charge current to 800ma and the usb charge current to 500ma. stability considerations the constant-voltage mode feedback loop is stable without any compensation provided a battery is connected to the charger output. however, a 4.7f capacitor with a 1 series resistor is recommended at the bat pin to keep the ripple voltage low when the battery is disconnected. when the charger is in constant-current mode, the charge current program pin (idc or iusb) is in the feedback loop, not the battery. the constant-current mode stability is affected by the impedance at the charge current program pin. with no additional capacitance on this pin, the charger is stable with program resistor values as high as 20k (i chrg = 50ma); however, additional capacitance on these nodes reduces the maximum allowed program resistor. power dissipation when designing the battery charger circuit, it is not neces- sary to design for worst-case power dissipation scenarios because the ltc4097 automatically reduces the charge current during high power conditions. the conditions that cause the ltc4097 to reduce charge current through thermal feedback can be approximated by considering the power dissipated in the ic. most of the power dissipation is generated from the internal mosfet pass device. thus, the power dissipation is calculated to be: p d = (v cc C v bat ) ? i bat p d is the power dissipated, v cc is the input supply volt- age (either dcin or usbin), v bat is the battery voltage and i bat is the charge current. the approximate ambient temperature at which the thermal feedback begins to protect the ic is: t a = 115c C p d ? ja t a = 115c C (v cc C v bat ) ? i bat ? ja example: an ltc4097 operating from a 5v usb adapter (on the usbin input) is programmed to supply 500ma full-scale current to a discharged li-ion battery with a voltage of 3.3v. assuming ja is 60c/w (see thermal considerations), the ambient temperature at which the ltc4097 will begin to reduce the charge current is ap- proximately: t a = 115c C (5v C 3.3v) ? (500ma) ? 60c/w t a = 115c C 0.85w ? 60c/w = 115c C 51c t a = 64c
ltc4097 16 4097f applications information the ltc4097 can be used above 64c ambient, but the charge current will be reduced from 500ma. the ap- proximate current at a given ambient temperature can be approximated by: i ct vv bat a in bat ja = 115 C (C ? ) using the previous example with an ambient temperature of 75c, the charge current will be reduced to approxi- mately: i cc vv cw c ca bat = = 115 75 53360 40 102 C (C.)? / / i ima bat = 392 it is important to remember that ltc4097 applications do not need to be designed for worst-case thermal conditions, since the ic will automatically reduce power dissipation when the junction temperature reaches approximately 115c. moreover a thermal shut down protection circuit around 150c safely prevents any damage by forcing the ltc4097 into shut down mode. thermal considerations in order to deliver maximum charge current under all conditions, it is critical that the exposed metal pad on the backside of the ltc4097 package is properly soldered to the pc board ground. when correctly soldered to a 2500mm 2 double sided 1oz copper board, the ltc4097 has a thermal resistance of approximately 60c/w. failure to make thermal contact between the exposed pad on the backside of the package and the copper board will result in thermal resistances far greater than 60c/w. as an example, a correctly soldered ltc4097 can deliver over 500ma to a battery from a 5v supply at room temperature. without a good backside thermal connection, this number would drop to much less than 300ma. alternate ntc thermistors and biasing the ltc4097 provides temperature quali? ed charging if a grounded thermistor and a bias resistor are connected to ntc. by using a bias resistor whose value is equal to the room temperature resistance of the thermistor (r25) the upper and lower temperatures are pre-programmed to approximately 40c and 0c, respectively (assuming a vishay curve 1 thermistor). the upper and lower temperature thresholds can be ad- justed by either a modi? cation of the bias resistor value or by adding a second adjustment resistor to the circuit. if only the bias resistor is adjusted, then either the upper or the lower threshold can be modi? ed but not both. the other trip point will be determined by the characteristics of the thermistor. using the bias resistor in addition to an adjustment resistor, both the upper and the lower tempera- ture trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease. examples of each technique are given below. ntc thermistors have temperature characteristics which are indicated on resistance-temperature conversion tables. the vishay-dale thermistor nths0603n011-n1003f, used in the following examples, has a nominal value of 100k and follows the vishay curve 1 resistance-temperature characteristic. in the explanation below, the following notation is used. r25 = value of the thermistor at 25c r ntc|cold = value of thermistor at the cold trip point r ntc|hot = value of the thermistor at the hot trip point r cold = ratio of r ntc|cold to r25 r hot = ratio of r ntc|hot to r25 r nom = primary thermistor bias resistor (see fig- ure 4) r1 = optional temperature range adjustment resistor (see figure 5) the trip points for the ltc4097s temperature quali? cation are internally programmed at 0.349 ? vntc for the hot threshold and 0.765 ? vntc for the cold threshold. therefore, the hot trip point is set when: r rr vntc vntc ntc hot nom ntc hot | | ?.? + = 0 349
ltc4097 17 4097f applications information C + C + r nom 100k r ntc 100k ntc vntc 3 0.1v ntc_enable 4097 f04 ntc block too_cold too_hot 0.765 ? vntc 0.349 ? vntc C + 6 C + C + r nom 105k r ntc 100k r1 12.7k ntc vntc 3 0.1v ntc_enable 4097 f05 too_cold too_hot 0.765 ? vntc 0.349 ? vntc C + 6 ntc block figure 4. typical ntc thermistor circuit and the cold trip point is set when: r rr vntc vntc ntc cold nom ntc cold | | ?.? + = 0 765 solving these equations for r ntc|cold and r ntc|hot results in the following: r ntc|cold = 0.536 ? r nom and r ntc|cold = 3.25 ? r nom by setting r nom equal to r25, the above equations result in r hot = 0.536 and r cold = 3.25. referencing these ratios to the vishay resistance-temperature curve 1 chart gives a hot trip point of about 40c and a cold trip point of about 0c. the difference between the hot and cold trip points is approximately 40c. by using a bias resistor, r nom , different in value from r25, the hot and cold trip points can be moved in either direc- tion. the temperature span will change somewhat due to the non-linear behavior of the thermistor. the following equations can be used to easily calculate a new value for the bias resistor: r r r r r r nom hot nom cold = = 0 536 25 325 25 . ? . ? where r hot and r cold are the resistance ratios at the desired hot and cold trip points. note that these equations are linked. therefore, only one of the two trip points can be chosen, the other is determined by the default ratios designed in the ic. consider an example where a 60c hot trip point is desired. from the vishay curve 1 r-t characteristics, r hot is 0.2488 at 60c. using the above equation, r nom should be set to 46.4k. with this value of r nom , the cold trip point is about 16c. notice that the span is now 44c rather than the previous 40c. this is due to the decrease in tem- perature gain of the thermistor as absolute temperature increases. the upper and lower temperature trip points can be inde- pendently programmed by using an additional bias resistor as shown in figure 5. the following formulas can be used to compute the values of r nom and r1: r rr r rrr nom cold hot nom hot = = C . ? .? C ? 2 714 25 1 0 536 r r25 for example, to set the trip points to 0c and 45c with a vishay curve 1 thermistor choose rkk nom == 3 266 0 4368 2 714 100 104 2 .C. . ?. figure 5. ntc thermistor circuit with additional bias resistor
ltc4097 18 4097f applications information the nearest 1% value is 105k. r1 = 0.536 ? 105k C 0.4368 ? 100k = 12.6k the nearest 1% value is 12.7k. the ? nal solution is shown in figure 5 and results in an upper trip point of 45c and a lower trip point of 0c. protecting the usb pin and wall adapter input from overvoltage transients caution must be exercised when using ceramic capaci- tors to bypass the usbin or the wall adapter inputs. high voltage transients can be generated when the usb or wall adapter is hot plugged. when power is supplied via the usb bus or wall adapter, the cable inductance along with the self resonant and high q characteristics of ceramic capacitors can cause substantial ringing which could exceed the maximum voltage ratings and damage the ltc4097. refer to linear technology application note 88, entitled ceramic input capacitors can cause overvoltage transients for a detailed discussion of this problem. always use an oscilloscope to check the voltage wave- forms at the usbin and dcin pins during usb and wall adapter hot-plug events to ensure that overvoltage transients have been adequately removed. reverse polarity input voltage protection in some applications, protection from reverse polarity voltage on the input supply pins is desired. if the sup- ply voltage is high enough, a series blocking diode can be used. in other cases where the voltage drop must be kept low, a p-channel mosfet can be used (as shown in figure 6). wall adapter dcin ltc4097 drain-bulk diode of fet 4097 f06 figure 6. low loss input reverse polarity protection
ltc4097 19 4097f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description 2.00 0.10 (2 sides) note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 0.64 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 2.39 0.10 (2 sides) 3.00 0.10 (2 sides) 1 6 12 7 pin 1 bar top mark (see note 6) 0.200 ref 0 C 0.05 (ddb12) dfn 0106 rev ? 0.23 0.05 0.45 bsc pin 1 r = 0.20 or 0.25 45 chamfer 0.25 0.05 2.39 0.05 (2 sides) recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.64 0.05 (2 sides) 1.15 0.05 0.70 0.05 2.55 0.05 package outline 0.45 bsc ddb package 12-lead plastic dfn (3mm 2mm) (reference ltc dwg # 05-08-1723 rev ?)
ltc4097 20 4097f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 0207 ? printed in usa related parts part number description comments ltc3455 dual dc/dc converter with usb power management and li-ion battery charger ef? ciency >96%, accurate usb current limiting (500ma/100ma), 4mm 4mm qfn-24 package ltc4053 usb compatible monolithic li-ion battery charger standalone charger with programmable timer, up to 1.25a charge current ltc4054/ltc4054x standalone linear li-ion battery charger with integrated pass transistor in thinsot tm thermal regulation prevents overheating, c/10 termination, c/10 indicator, up to 800ma charge current ltc4055 usb power controller and battery charger charges single-cell li-ion batteries directly from usb port, thermal regulation, 4mm 4mm qfn-16 package ltc4058/ltc4058x standalone 950ma lithium-ion charger in dfn c/10 charge termination, battery kelvin sensing, 7% charge accuracy ltc4061 standalone li-ion charger with thermistor interface 4.2v, 0.35% float voltage, up to 1a charge current, 3mm 3mm dfn-10 package ltc4061-4.4 standalone li-ion charger with thermistor interface 4.4v, 0.4% float voltage, up to 1a charge current, 3mm 3mm dfn-10 package ltc4062 standalone li-ion charger with micropower comparator 4.2v, 0.35% float voltage, up to 1a charge current, 3mm 3mm dfn-10 package ltc4065/ltc4065a standalone 750ma li-ion charger in 2mm 2mm dfn 4.2v, 0.6% float voltage, up to 750ma charge current, 2mm 2mm dfn-6 package ltc4066 usb power controller and li-ion linear battery charger with low-loss ideal diode seamless transition between input power sources: li-ion battery, usb and wall adapter, low-loss (50 # ) ideal diode, 4mm 4mm qfn-24 package ltc4068/ltc4068x standalone linear li-ion battery charger with programmable termination charge current up to 950ma, thermal regulation, 3mm 3mm dfn-8 package ltc4069 standalone li-ion battery charger with ntc thermistor input in 2mm 2mm dfn 4.2v, 0.6% float voltage, up to 750ma charge current, timer termination + c/10 detection output ltc4075 dual input standalone li-ion battery charger charges single-cell li-ion batteries from wall adapter and usb inputs with automatic input power detection and selection, 950ma charger current, thermal regulation, c/x charge termination, 3mm 3mm dfn package ltc4076 dual input standalone li-ion battery charger charges single-cell li-ion batteries from wall adapter and usb inputs with automatic input power detection and selection, 950ma charger current, thermal regulation, c/x charge termination, 3mm 3mm dfn package ltc4077 dual input standalone li-ion battery charger charges single-cell li-ion batteries from wall adapter and usb inputs with automatic input power detection and selection, 950ma charger current, thermal regulation, c/10 charge termination, 3mm 3mm dfn package ltc4085 usb power manager with ideal diode controller and li-ion charger charges single-cell li-ion batteries directly from a usb port, thermal regulation, 200m # ideal diode with <50m # option, 4mm 3mm dfn-14 package ltc4089/ltc4089-5 usb power manager with ideal diode controller and high ef? ciency li-ion battery charger high ef? ciency 1.2a charger from 6v to 36v (40v max) input, bat-track? adaptive output control (ltc4089), fixed 5v output (ltc4089-5), charges single-cell li-ion batteries directly from usb port, thermal regulation, 200m # ideal diode with <50m # option, 4mm 3mm dfn-14 package ltc4096/ltc4096x dual input standalone li-ion battery charger charges single-cell li-ion batteries from wall adapter and usb inpu ts with automatic input power detection and selection, 1.2a charger current, thermal regulation, c/x charge termination, input power present output (pwr) with 120ma drive capability, 3mm 3mm dfn package ltc4410 usb power manager and battery charger manages total power between a usb peripheral and battery charger, ultralow battery drain: 1a, thinsot package ltc4411/ltc4412 low loss powerpath tm controller in thinsot automatic switching between dc sources, load sharing, replaces oring diodes thinsot and powerpath are trademarks of linear technology corporation


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